![]() CLOCK SIGNAL GENERATOR
专利摘要:
The invention relates to a device for converting an optical pulse into an electronic pulse comprising a photoresistor (302) having first and second terminals and being adapted to receive a pulsed laser signal (204) from a laser source (202). mode-locked mode, wherein: the first terminal is connected to an application node of a reference potential (GND) by a resistive element (214) and a capacitive element (304) connected in parallel; and the second terminal is connected to a node (210) for applying a supply potential (VDC). 公开号:FR3059439A1 申请号:FR1661725 申请日:2016-11-30 公开日:2018-06-01 发明作者:Hanae Zegmout;Denis Pache;Stephane Le Tual 申请人:STMicroelectronics SA; IPC主号:
专利说明:
Field The present application relates to an optoelectronic device, and in particular a clock signal generation device. Presentation of the prior art FIG. 1 illustrates a clock signal 100 as a function of time. The clock signal is intended to be used by an electronic circuit, for example an analog-digital conversion circuit ADC (from the English Analog to Digital Converter) having a high resolution, for example greater than 14 bits, and a high input frequency, for example greater than 1 GHz. The clock signal can have a high clock frequency, for example greater than 100 MHz. The clock signal 100 comprises electronic pulses 102 each of which begins with a rising edge 104. It would be desirable for the ADC circuit for the clock signal to correspond to an ideal signal 108, shown in dotted lines, having separate successive rising edges with a regular duration tg. However, in practice, rising edges 0 104 are not perfectly regular and, with respect to ideal rising edges, rising edges 104 are ahead or behind by a random duration ht. The duration ht corresponds to B15493 - 16-GR1-0494 an instability value, of which the standard deviation (or RMS value, from the English Root Mean Square) is called jitter. The clock signals generated by current clock devices have high jigs, for example several tens of fs. In addition, while the ideal signal 108 instantly goes from a low value to a high value, obtaining a rise time of less than a few ps is difficult in practice. summary One embodiment provides a device which overcomes all or part of the drawbacks described above. One embodiment provides a clock circuit providing a pulse signal with low jitter, for example less than 10 fs. One embodiment provides a clock circuit providing a pulse signal having a short rise time, for example less than 4 ps. One embodiment provides a circuit for converting optical pulses into electronic pulses with a small random offset, for example less than 10 fs, between the optical pulses and the electronic pulses. Thus, one embodiment provides a device for converting an optical pulse into an electronic pulse comprising a photoresistor having first and second terminals and being adapted to receive a pulsed laser signal from a laser source with blocked modes, in which : the first terminal is connected to a node for applying a reference potential by a resistive element and a capacitive element connected in parallel; and the second terminal is connected to a node for applying a supply potential. According to one embodiment, the product of the capacitance of the capacitive element by the resistance value of the photoresistor in the on state is less than 3 ps. B15493 - 16-GR1-0494 According to one embodiment, the photoresistor is designed to have, during the optical pulse, a resistance value of less than 50 Ω. According to one embodiment, the photoresistor comprises a semiconductor region doped with less than 5 * 10 ^ 5 atoms / cm ^ provided with two contacts separated by a distance between 3 and 9 pm. According to one embodiment, the semiconductor region is made of germanium and the optical pulse has a central wavelength between 1.3 and 1.8 μm. According to one embodiment, said semiconductor region is an extension of a flare of a silicon core of a waveguide. According to one embodiment, said semiconductor region has a length of between 15 and 20 μm. According to one embodiment, the first terminal of the photoresistor is connected to the input of an amplifier. According to one embodiment, the resistance value of the resistive element is between the resistance values of the photoresistor in the on state and in the non-on state, for example equal to the square root of the product of the values of resistance of the photoresistor in the on state and in the non-on state. According to one embodiment, the product of the capacity of the capacitive element by the resistance value corresponding to the photoresistor in the non-passing state in parallel with the resistive element, corresponds to a duration greater than 100 ps. One embodiment provides a clock signal generator comprising the above device. Brief description of the drawings These characteristics and advantages, as well as others, will be explained in detail in the following description of particular embodiments made without implied limitation in relation to the attached figures, among which: B15493 - 16-GR1-0494 Figure 1, described above, illustrates a clock signal as a function of time; FIG. 2 schematically represents a clock device; FIG. 3A schematically represents an example of an embodiment of a clock device; Figure 3B is a timing diagram illustrating a laser signal and a clock signal in the device of Figure 3A; and FIGS. 4A and 4B are schematic views, respectively from above and in section, of an example of photoresistor of an embodiment of a clock device. detailed description The same elements have been designated by the same references in the various figures and, moreover, the various chronograms and views are not drawn to scale. For the sake of clarity, only the elements useful for understanding the described embodiments have been shown and are detailed. In particular, the laser sources emitting optical pulses and the circuits using electronic pulses are not shown in detail. In the description which follows, unless otherwise specified, the expressions substantially, and of the order of signify to the nearest 10%, preferably to the nearest 5%. In the present description, the term connected designates a direct electrical connection between two elements, while the term coupled or connected designates a connection between two elements which can be direct or by the intermediary of one or more passive or active components, such as resistors, capacitors, inductors, diodes, transistors, etc. In order to obtain an electronic clock signal in pulses having a low jitter, it is proposed here to convert optical pulses into electronic pulses B15493 - 16-GR1-0494 supplied by a locked mode laser source. Such a source produces a pulsed laser signal having an extremely low jitter, typically less than 10 fs, and having extremely steep edges of rise and fall times, for example less than 100 fs. FIG. 2 represents a clock device 200. The clock circuit comprises a pulsed laser source 202 (PULSE) intended to produce a pulsed laser signal 204. A photodiode 206 is connected to the pulsed laser source 202 by a waveguide 208. The presence of the waveguide does not increase the jitter of the laser signal, but slightly increases the rise and fall times which remain very short , typically less than a few ps. Photodiode 206 has its cathode connected to a node 210 for applying a high VDC potential, and its anode connected to a node 212 connected by a resistive element 214 to a node for applying a reference potential, for example GND mass. The node 212 is connected to the input of a voltage amplifier 216 which supplies a clock signal 218 intended for example for an ADC circuit 220. In operation, at each optical pulse, the photodiode produces a photocurrent Ig, which causes a pulse of the clock signal 218. A problem is that the clock signal obtained is difficult to use by the ADC circuit 220 when this circuit is high resolution and high input frequency. Indeed, if one wants to obtain a photodiode capable of converting almost all of the optical radiation of the laser into photocurrent, this photodiode must have sufficient dimensions. The photodiode then has a high capacitance Cp between its cathode and its anode, typically greater than 1 pf for a high VDC potential of between 0.5 and 2 V. The capacitance Cp lengthens the rise time of the pulses of the clock signal 218 , which poses problems for the ADC circuit B15493 - 16-GR1-0494 operation similar to that caused by high clock signal jitter. We can try to reduce the capacitance Cp of the photodiode by reducing the dimensions of the photodiode, but in doing so we inevitably decrease the intensity of the photocurrent Iq generated. The variations in potential of the node 212 are therefore difficult to distinguish from the noise level produced by the photodiode 206 and by the resistive element 214. This noise produces in the clock signal a high jitter, for example greater than 50 fs, despite the extremely low jitter of the pulsed laser signal 204. To solve these problems, one could try to replace the photodiode for example by a PIN type photodiode or by a phototransistor, but this would pose integration, manufacturing and implementation problems. A clock device is proposed here based on the conversion of a pulsed laser signal into an electronic clock signal, in which the conversion between optical pulses and electronic pulses is carried out by keeping short rise times, and substantially without adding any optical pulse jitter. FIG. 3A represents an example of an embodiment of a clock device 300 based on the conversion of an optical signal into an electronic signal. The device 300 differs from the device 200 of FIG. 2 in that it comprises a photoresistor 302 in place of the photodiode 206 of the device 200. The photoresistor 302 comprises a semiconductor region, intrinsic or weakly doped, for example less than 5 * 10 ^ -6 atoms / cm3 or at a level of the order of 5 * 10 ^^ atoms / cm ^, preferably in germanium in the case of a laser whose central wavelength is located in the near infrared and is for example between 1.3 and 1.8 pm. This semiconductor region is provided on either side with two contacts separated by a distance for example between 3 and 9 μm, for example of the order of 8 μm. B15493 - 16-GR1-0494 Furthermore, the device 300 comprises elements similar to those of the device 200 of FIG. 2, arranged in a similar manner. Thus, the photoresistor 302 connects a node 210 for applying the VDC potential to a node 212 coupled to ground by a resistor 214, the node 212 being coupled to the input of an amplifier 216 whose output is coupled to a circuit ADC 220. The device 300 further comprises a capacitive element 304 connecting the node 212 to the GND ground. A capacitance value C represents that of the capacitive element 304 and of all the other elements connected to the node 212. As a variant, the capacitive element 304 can be an input capacitor of the amplifier 216. FIG. 3B is a chronogram illustrating, as a function of time, in the device 300 of FIG. 3A in operation, the pulsed laser signal 204 and the clock signal 308 supplied by the amplifier 216. The level of the pulsed laser signal 204 corresponds to the power P of the optical radiation received by the photoresistor 302. The pulsed laser signal 204 comprises pulses 310 of peak power Pq, between which no significant optical radiation is received by the photoresistor. For example, the average power of the laser signal is greater than 10 mW. The optical pulses 310 have rising edges 312 separated by a duration tq. For example, the laser source 202 is provided so that the duration tq is less than 10 ns, preferably less than 1 ns. By way of example, the laser source 202 and the waveguide 208 are chosen so that the optical pulses 310 have a duration tp of less than 4 ps, during which the power P is greater than half of the peak power Pq . Between the optical pulses 310, the photoresistor 302 has a high resistance value Roee- During the optical pulses, the value of the photoresistor 302 changes to a low value Rqjq. B15493 - 16-GR1-0494 The photoresistor 302 of the device 300 is chosen so that the product of the resistance value Rqn by the capacitance value C corresponds to a short duration, for example less than the duration of the optical pulses 310, for example less than 3 ps. In addition, the resistance value Rqn is chosen to be low, for example the resistance value Rqn is chosen less than 50 Ω, preferably less than 15 Ω. Furthermore, the difference between the high VDC and low GND potentials is for example between 0.5 and 2 V. The value R of the resistor 214 is for example between 0.2 and 5] <Ω. Each optical pulse 310 corresponds to an electronic pulse 314 of the clock signal 308. During each rising edge of the pulses 314, the level V of the signal 308 increases from an initial value Vq and reaches a peak value Vp after a time of rise Îqn- The level V then decreases during a descent phase to reach the value Vq after a descent time tQpp. Because the product Ron * C is weak, the rise time îqn of the clock signal is short, for example less than 4 ps. For this, an amplifier 216 was chosen which is fast enough not to significantly increase the voltage rise time at the node 212. In addition, because the product Ron * C is weak, and because the resistance Rqn is weak, the clock signal 308 supplied by the device 300 has a particularly weak jitter, for example less than 10 fs. Indeed, a low resistance value Rqn makes it possible to choose a capacitance C sufficient to obtain a noise level of the voltage of the node 212 which is particularly low during the rising edges of the clock signal 308. This low noise level, associated with a short rise time, allows a low jitter of the voltage of node 212. It is noted that, contrary to a common prejudice on photoresistors, photoresistor 302 has times of B15493 - 16-GR1-0494 reaction short enough to convert signals of frequencies as high as those of the pulsed laser signal 204. In particular, contrary to this prejudice, photoresistor 302 is fast enough for its resistance to have time to return to the value Rqff after each optical pulse 310. To obtain this, as indicated previously, provision has been made in the photoresistor 302 for the contacts on either side of the semiconductor region to be separated by a small distance, for example less at 9 pm. This distance is provided so that the charges which are created in the semiconductor region at each optical pulse, and which then allow the passage of current in the photoresistor, recombine with the contacts in a time, for example less than 1 ns. Furthermore, the photoresistor 302 has a high resistance value Roff, for example greater than the R value of the resistance 214. The capacitive element 304 makes it possible to obtain fall times Tqff of the pulses 314 of the clock signal 308 sufficiently long, so that the pulses 314 have a duration sufficient to allow the use of the clock signal 308 by the ADC circuit 220. For example, the product of the capacitance C by the resistance value of a resistance of value Rqff in parallel with a resistor of value R corresponds to a duration greater than 100 ps. By way of example, provision is made for the resistive element 214 to be formed by a photoresistor similar to the photoresistor 302 not subjected to the optical radiation of the laser. This gives substantially equal values of R and Roff. Alternatively, the resistance value R is between NQR e t Roff 'P ar example equal to the square root of the product Ron * ^ OFF' to optimize the difference between the low and high levels of the voltage of the node 212. FIGS. 4A and 4B are schematic views, respectively from above and in section along a plane B-B, of an example of photoresistor 302 of the photoresistor type. B15493 - 16-GR1-0494 device 300. When reference is made here to the terms on, or horizontal, reference is made to the orientation of the element concerned in FIG. 4B, it being understood that, in practice, the structure described can be oriented differently. The photoresistor 302 comprises, on a support 402 covered with a layer 404 of silicon oxide, a region 406 made of qermanium situated in the extension of a flaring 408 at the end of a wave quide core 208. The core 208, the flaring 408 and the region 406 rest on the layer 404 and are of thicknesses, for example substantially equal. In top view, the region 406 has for example the shape of a rectanqle of which a small side is in contact with the flare 408. A layer 410 of silicon oxide covers the layer 404 outside the core 208, of the flare 408 and region 406 which are flush with the surface of layer 410. The structure is covered with a layer 411 of silicon oxide. The wave quid heart 208, its flare 408 and the region 406, are thus surrounded by silicon oxide. The region 406 is provided with contacts 412 and 414 in the upper part, on either side of the region 406, in contact with the layer 410. Examples of contacts 412 and 414 are detailed in the sectional view of the figure 4B . Each contact comprises a doped region 416, for example of the P type, in contact with a metallization 418 which can extend over the layer 410 away from the region 406. The doped regions 416 of the contacts 412 and 414 are similar conductivity type. Each doped region 416 and the associated metallization 418 can extend in plan view over the whole of one side of the region 406. The contacts 412 and 414 constitute the terminals of the photoresistor, and are connected to the nodes 210 and 212 of the device 300. The qermanium 406 region is intrinsic, that is to say not voluntarily doped, or has a low level of dopaqe, for example less than 5 * 10 ^^ atoms / cm ^ or at a level B15493 - 16-GR1-0494 of the order of 5 * 10 ^ 6 atoms / cm ^, of the same type of conductivity as the regions 416. By way of example, the core 208 has transverse dimensions of between 300 nm and 3 μm, for example the core 208 has a rectangular section of 300 nm in the direction of the thickness of the layers and of 500 nm horizontally. By way of example, the rectangle drawn by the region 406 seen from above has a width of between 3 and 9 μm. By way of example, the length over which the photoresistor extends from the flare 408, or length of the photoresistor, is between 15 and 20 μm. In operation, a laser source emits optical radiation, for example with a central wavelength between 1.3 and 1.8 μm, for example 1560 nm. This radiation propagates in the waveguide 208 without being significantly absorbed and reaches the region 406. Because the region 406 is made of germanium, the optical radiation is absorbed there and causes the passage of a current between the contacts 412 and 414. Because the germanium region 406 is an extension of the flare 408 of the waveguide 208, the optical radiation effectively penetrates into the region 406 before being absorbed there. A particularly high conversion rate of optical radiation into current is obtained, allowing a low resistance Rqp in the on state. In addition, as indicated previously, a photoresistor was obtained making it possible to carry out this conversion at high frequencies, for example greater than 100 MHz. Particular embodiments have been described. Various variants and modifications will appear to those skilled in the art. In particular, in the device 300 of FIG. 3A, the resistive element 214 and the amplifier 216 form a circuit for converting an input current from the node 212 into a voltage corresponding to the clock signal 308. We can replace the resistive element 214 and the amplifier 216 with any B15493 - 16-GR1-0494 other suitable current-voltage conversion circuit. For example, the amplifier 216 of the conversion circuit of the device 300 is omitted and the node 212 is connected directly to the circuit 220. The current-voltage conversion circuit can then comprise the only resistive element 214 and / or a resistor input of circuit 220 connecting node 212 to GND ground. Furthermore, in the embodiments described, it is possible, as a variant, to exchange the low GND and high VDC potentials, and thus to obtain falling edges. It is also possible to reverse the rising and falling directions of the edges of the clock signal, for example by replacing the amplifier 216 with an inverting amplifier. Thus, rising edges can be obtained by exchanging the locations of resistor 214 and photoresistor 302 and replacing the amplifier with an inverting amplifier. Although, in the embodiments described, the electronic circuit 220 receiving a clock signal is an analog-digital converter, the clock signal can be used by any circuit using to operate a clock signal, for example a logic or digital circuit, or can for example be used as reference signal of a phase locked loop PLL (from the English Phase Locked Loop). B15493 16-GR1-0494
权利要求:
Claims (11) [1" id="c-fr-0001] 1. Device for converting an optical pulse (310) into an electronic pulse (314) comprising a photoresistor (302) having first and second terminals and being adapted to receive a pulsed laser signal (204) in (202) blocked modes, from a laser source which: the first terminal is connected to a node for applying a reference potential (GND) by a resistive element (214) and a capacitive element (304) connected in parallel; and the second terminal is connected to a node (210) for applying a supply potential (VDC). [2" id="c-fr-0002] 2. Device according to claim 1, in which the product of the capacitance (C) of the capacitive element (304) by the resistance value (Rq ^) of the photoresistor (302) in the on state is less than 3 ps. [3" id="c-fr-0003] 3. Device according to claim 1 or 2, wherein the photoresistor (302) is designed to have during the optical pulse (310) a resistance value (Rqj ^) less than 50 Ω. [4" id="c-fr-0004] 4. Device according to any one of claims 1 to 3, wherein the photoresistor (302) comprises a semiconductor region (406) doped with less than 5 * 10 ^^ atoms / cm ^ provided with two contacts (412, 414) separated by a distance between 3 and 9 pm. [5" id="c-fr-0005] 5. Device according to claim 4, in which the semiconductor region (406) is made of germanium and the optical pulse (310) has a central wavelength between 1.3 and 1.8 pm. [6" id="c-fr-0006] 6. Device according to claim 4 or 5, wherein said semiconductor region (406) is in extension of a flare of a silicon core of a waveguide (208). [7" id="c-fr-0007] 7. Device according to any one of claims 4 to 6, wherein said semiconductor region (406) has a length between 15 and 20 pm. B15493 - 16-GR1-0494 [8" id="c-fr-0008] 8. Device according to any one of claims 1 to 7, wherein the first terminal of the photoresistor (302) is connected to the input of an amplifier (216). 5 [9" id="c-fr-0009] 9. Device according to any one of claims 1 to 8, in which the resistance value (R) of the resistive element (214) is between the resistance values of the photoresistor in the on state (Ron) e t to the OFF state (Roff) 'P ar example equal to the square root [10" id="c-fr-0010] 10 of the product of the resistance values of the photoresistor in the on state and in the non-on state. 10. Device according to any one of claims 1 to 9, in which the product of the capacitance (C) of the capacitive element (304) by the resistance value 15 corresponding to the photoresistor (302) in the non-passing state in parallel with the resistive element (214), corresponds to a duration (ioff) greater than 100 ps. [11" id="c-fr-0011] 11. Clock signal generator comprising a device according to any one of claims 1 to 10. B 15493 1/3 200
类似技术:
公开号 | 公开日 | 专利标题 FR3059439B1|2019-08-09|CLOCK SIGNAL GENERATOR Kang et al.2007|Si avalanche photodetectors fabricated in standard complementary metal-oxide-semiconductor process FR2916574A1|2008-11-28|SEMICONDUCTOR DEVICE FR2463978A1|1981-02-27|INTEGRATED SOLAR CELL WITH A DERIVATION DIODE AND METHOD FOR MANUFACTURING THE SAME EP2600125B1|2016-04-20|Radiation-detection device with improved illumination range EP2458849B1|2014-04-16|Correlated double sampling detection circuit with an improved anti-blooming circuit FR3000608A1|2014-07-04|SEMICONDUCTOR STRUCTURE OF THE AVALANCHE PHOTODIODE TYPE AND PROCESS FOR PRODUCING SUCH A STRUCTURE FR3015113A1|2015-06-19|LOW NOISE QUANTUM DETECTION ELEMENT AND METHOD FOR MANUFACTURING SUCH PHOTODETECTION ELEMENT FR3059438A1|2018-06-01|CLOCK SIGNAL GENERATOR FR2977982A1|2013-01-18|INGAAS PHOTODIOD MATRIX EP2184788A1|2010-05-12|Photodetector with internal gain and detector comprising an array of such photodetectors EP1147389A1|2001-10-24|Bolometric detector with antenna Li et al.2003|Very fast metal-semiconductor-metal ultraviolet photodetectors on GaN with submicron finger width WO2010130950A1|2010-11-18|Built-in very high sensitivity image sensor EP3657556A1|2020-05-27|Method for manufacturing at least one passivated planar photodiode with reduced dark current EP3293880B1|2021-02-24|Adaptation circuit for low noise amplifier and low noise amplifier including such a circuit FR2538168A1|1984-06-22|SEMICONDUCTOR DEVICE PROTECTED AGAINST SECOND TYPE BREAKDOWN, IN PARTICULAR POWER TRANSISTOR WO2014057090A1|2014-04-17|Device for electro‑optical sampling of a microwave frequency signal FR3066017B1|2019-07-05|PYROELECTRIC INFRARED DETECTION DEVICE HAVING INFRARED MODULATION TRANSMITTER EP3676960B1|2021-10-13|Integrated optical switch EP0546919B1|1997-04-16|Heterojunction bipolar transistor insensitive to external temperature variation and associated integrated circuit FR3065583A1|2018-10-26|DEVICE FOR DETECTING RADIATION COMPRISING ORGANIC PHOTODIODS EP1931030B1|2009-09-02|Current preamplifier and associated current comparator EP3660930B1|2021-03-31|Method for manufacturing a photodiode array made of germanium and with low dark current EP3696865A1|2020-08-19|Photodiode
同族专利:
公开号 | 公开日 CN207321218U|2018-05-04| US10305456B2|2019-05-28| FR3059439B1|2019-08-09| US20180152179A1|2018-05-31| CN108123701B|2021-10-29| CN108123701A|2018-06-05|
引用文献:
公开号 | 申请日 | 公开日 | 申请人 | 专利标题 JPS5818988A|1981-07-28|1983-02-03|Toshiba Corp|Driving device for semiconductor laser| EP0525819A1|1985-10-22|1993-02-03|Fujitsu Limited|A pulse amplifier suitable for use in a semiconductor laser driving device| US4766471A|1986-01-23|1988-08-23|Energy Conversion Devices, Inc.|Thin film electro-optical devices| US7940201B1|2009-07-02|2011-05-10|Hrl Laboratories, Llc|Photonic analog to digital converter input sampler| US3521244A|1968-10-23|1970-07-21|Rca Corp|Electrical circuit for processing periodic signal pulses| JPS5894218A|1981-11-30|1983-06-04|Semiconductor Res Found|Photocoupler| CN88200499U|1988-01-16|1988-09-21|广东省连平塑料厂|Automatic illumination-regulating device for keeping illumination constant| US4959540A|1989-05-15|1990-09-25|International Business Machines Corporation|Optical clock system with optical time delay means| US5157676A|1990-06-19|1992-10-20|The United States Of America As Represented By The United States Department Of Energy|Apparatus and process for active pulse intensity control of laser beam| US5418360A|1994-01-21|1995-05-23|Ecole Polytechnique|Serial optical signal distribution system and method, and optical/electrical converter for implementation thereof| JP3416432B2|1996-12-24|2003-06-16|キヤノン株式会社|Photoelectric conversion device and driving method thereof| US6806457B2|2001-09-28|2004-10-19|Tai-Her Yang|Transistor photoelectric conversion drive circuit| CN2609314Y|2003-02-24|2004-03-31|德阳电缆股份有限公司|Intersection tail-pursuing lamplight controller| JP4537832B2|2004-11-11|2010-09-08|株式会社東芝|Optical clock distribution device and optical clock distribution system| JP2010206168A|2009-02-03|2010-09-16|Rohm Co Ltd|Photodetector, object detector using same, and disc device| CN202121563U|2011-07-18|2012-01-18|任永斌|Hard light remote switch system without demodulator circuit or amplifying circuit| CN105101585A|2015-09-22|2015-11-25|成都汇丁科技有限公司|Light-operated street lamp controller circuit| FR3059438A1|2016-11-30|2018-06-01|Stmicroelectronics Sa|CLOCK SIGNAL GENERATOR| FR3059439B1|2016-11-30|2019-08-09|Stmicroelectronics Sa|CLOCK SIGNAL GENERATOR|FR3059438A1|2016-11-30|2018-06-01|Stmicroelectronics Sa|CLOCK SIGNAL GENERATOR| FR3059439B1|2016-11-30|2019-08-09|Stmicroelectronics Sa|CLOCK SIGNAL GENERATOR| KR102087192B1|2019-04-30|2020-03-10|한국과학기술원|System for generating low-jitter digital clock signals using pulsed laser and microwave generator|
法律状态:
2017-10-19| PLFP| Fee payment|Year of fee payment: 2 | 2018-06-01| PLSC| Publication of the preliminary search report|Effective date: 20180601 | 2018-10-24| PLFP| Fee payment|Year of fee payment: 3 | 2019-10-22| PLFP| Fee payment|Year of fee payment: 4 | 2021-08-06| ST| Notification of lapse|Effective date: 20210705 |
优先权:
[返回顶部]
申请号 | 申请日 | 专利标题 FR1661725A|FR3059439B1|2016-11-30|2016-11-30|CLOCK SIGNAL GENERATOR| FR1661725|2016-11-30|FR1661725A| FR3059439B1|2016-11-30|2016-11-30|CLOCK SIGNAL GENERATOR| CN201720444919.9U| CN207321218U|2016-11-30|2017-04-25|For light pulse to be converted to the equipment and clock-signal generator of electronic impulse| CN201710278662.9A| CN108123701B|2016-11-30|2017-04-25|Clock signal generator| US15/605,536| US10305456B2|2016-11-30|2017-05-25|Clock signal generator| 相关专利
Sulfonates, polymers, resist compositions and patterning process
Washing machine
Washing machine
Device for fixture finishing and tension adjusting of membrane
Structure for Equipping Band in a Plane Cathode Ray Tube
Process for preparation of 7 alpha-carboxyl 9, 11-epoxy steroids and intermediates useful therein an
国家/地区
|